Shu's weekly group discussion

Wednesday 16 Sept 2026, 10:00 → 13:35 Asia/Shanghai

Tsung-Dao Lee Institute/N6F-N630 - Smart Classroom (Tsung-Dao Lee Institute)

Haidar Mas'ud Alfanda (TDLI, SJTU), Matthias Tartarin (TDLI, SJTU)

Online Zoom meeting room:

https://cern.zoom.us/j/4042031778

(PIN protected, see message from the group chat announcement)

10:00 → 10:05 Introduction & Announcements

Meeting's note: []

 

Announcements:

•  

 

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Today's focus: 

[1st project/analysis: XXX ]:

• item 1
  • sub-item 1
  • sub-item 2
• item 2
• [...]

[2nd project/analysis: XXX ]:

• item 1
• item 2
• [...]

[...]

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Plans: 

• [optional: indicate which project/analysis it refers to] item 1
• [optional: indicate which project/analysis it refers to] item 2

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10:05 → 10:10 Status

Speaker: Zhijing Zhang (TDLI, SJTU)

Today's focus:

[STCF's Optical Simulation]:

• • • • Compared the contribution of the air layer with and without the alumimum and epoxy glue at the back of the crystal.
      • Investigated how the thickness of the air layer affects the results.
      • Verified whether a higher surface roughness leads to higher light output and better uniformity.

[Others]:

• • • • I've recently been preparing for the new semester.

Plans:

[STCF's Optical Simulation]:

• • • • Run simulations under more conditions to verify whether the conclusions drawn from these comparisons are correct.

[Others]:

• • • • I'll need to attend classes and may have some small tests to complete.

10:10 → 10:20 Status

Speaker: Kang Yu (TDLI, SJTU)

10:20 → 10:30 Status

Speaker: Linjing Duan (TDLI, SJTU)

[ZZy]

Finished

• Completed the 4ℓγ integration job and submitted the Run-3 MC sample request ticket.

• Finished preparing the README and internal note for the EasyJet ZZγ framework.

Plan

• Focus on the Rivet validation plots for the requested MC samples and prepare a report summarizing the validation strategy and results.

• Finalize and share the corrected version of the EasyJet ZZγ framework with other members for validation.

• Reproduce the Run-2 validation with HGamGamStar as a cross-check of the EasyJet implementation.

[HGTD]

• Reviewed the scope, goals, and main technical tasks of the HGTD AQP project.

• Discuss the next steps with Matthias, especially the software setup and how to start working with the fitting farm.

• Start getting familiar with the relevant fitting-farm code and scan/fitting workflow.

 

10:30 → 10:40 Status

Speaker: Jun Wei Lok (TDLI, SJTU)

10:40 → 10:50 Status

Speaker: Zelin Yan (TDLI, SJTU)

10:50 → 11:00 Status

Speaker: Bai-Hong Zhou (TDLI, SJTU)

11:00 → 11:10 Status

Speaker: Xuliang Zhu (TDLI, SJTU)

11:10 → 11:20 Status

Speaker: Zhiyu Zhao (TDLI, SJTU)

11:20 → 11:30 Status

Speaker: Haidar Mas'ud Alfanda (TDLI, SJTU)

11:30 → 11:40 Status

Speaker: Matthias Tartarin (TDLI, SJTU)

 

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Today's focus: 

[Hyy*]:

• Lot of documentation and summary work done on both merged ID and CP studies. 
  
  

[ZZy]:

• (Please fill the Newdle link shared in the email Anke sent earlier, deadline is tomorrow. I re-sent the link in the WeChat a few days ago).

 

[VBS_KappaLambda]:

• The complete new UFO model created with FeynRules is operational (Wolfram Mathematica is now working). Previous results presented (about the c_WWH coupling) have been reproduced (validation) and beyond (more freedom in the model).

 

 

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Plans: 

• [ssWW]: Still same item as last week: Plan to finally present the unfolding studies.
• [Hyy*]: Develop original work from the documentation work already made. Focus on merged ID first.
• [VBS_KappaLambda]: Detector level studies are next ; Discussion with Prof. Xie to organise next effort is also considered
• No direct plan on the other topics, other than continuing what is already ongoing.

11:40 → 12:35 REU: Undergraduate Research Discussions

11:40 Status (w/ Linjing&Danning)

Speakers: Bingxian Li (SPA, SJTU), Jiacheng Shi (SPA, SJTU), Yuning Chen (Zhiyuan College, SJTU), Zhengyang Qian (SPA, SJTU)

11:50 Status (w/ Haydar)

Speakers: Hansheng Ye, Mingyu Huang (Univ. of Manchester (GB))

Today's focus

[CEPC Hbb Analysis]

Mingyu:

• Sample Production
  • Produced about 80k events so far.
  • Continued the production towards the 500k-event target.
• Observable distributions Plots
  • Learnt how to plot distribution and refine formatting with ROOT.
  • Explored distribution fitting for the analysis and adjusted fit parameters.
  • 
• Final report preparation
  • Making slides to summarize the internship work.

 

Hansheng:

Migrated the analysis chain from LCG105 to LCG109

• Rebuilt ZllSelector, PrimeTagSvc and HqqBDT in the LCG109 environment.
• Resolved the main environment issues during the migration.

Implement Haidar's ZllSelector --> flavour tagging --> derived ntuple workflow

• ZllSelector selects the dilepton system and passes the remaining PFOs to the jet/flavour-tagging analysis.
• Successfully ran HqqBDTReco with PrimeTag under LCG109 and produced ROOT ntuple output.
• Using Z-->mumu in the steering file for the time being.

Continued large-scale reconstruction

• Reco production has started, 300k events produced up till now.
• These reconstructed samples are ready to go through the ZllSelector + flavour-tagging analysis chain.

Future Goal

• Continue for Z-->ee channel and combine the results.
• Produce full derived ntuples for BDT training.

12:00 Status (w/ Xuliang)

Speaker: Hongyi Chen (University of Nottingham, Ningbo, China)

Finished

The current data and model weights are only test values. They are used to optimize the HLS program, not to evaluate the physics performance.

• Changed the U-Net to a streaming structure and used DATAFLOW so that different layers can run in parallel. The required skip connections were kept.

• Moved the U-Net weights from external inputs to internal ROMs. This reduced the number of generated memory interfaces from approximately 807 to two.

• Normalized the BDT inputs and thresholds and reduced their bit width from 32 bits to 6 bits.

• After optimization, the top-level latency was reduced from 660 to 279 cycles, and the interval was reduced from 661 to 280 cycles.

• The HLS synthesis time was reduced from approximately 10 hours to around 10 minutes.

• The optimized design was successfully implemented on the laboratory FPGA and met the timing and resource requirements.

Plans

• Train the U-Net and BDT using real data generated by the DarkSHINE simulation.

• Use Conifer to convert the trained Python BDT model into HLS code.

• Finally, test and validate the complete FPGA implementation using real data.